(1) Field of the Invention
The present invention relates to semiconductor integrated circuits which include two CPUs, in particular, to a semiconductor integrated circuit provided in a television receiver, a video and audio reproducing apparatus, a video and audio recording apparatus, and other apparatuses, and to a television.
(2) Description of the Related Art
The patent reference 1 (Japanese Unexamined Patent Application Publication No. 2008-59052) discloses a microcomputer which includes a main CPU and a sub CPU. FIG. 14 is a block diagram showing a configuration of a microcomputer MCU according to a related art. The MCU includes a nonvolatile memory 4, a controller 105, and a main CPU 2. The controller 105 includes a sub CPU (FCPU) 112 which stores a controlling program. The controlling program is executed to implement writing in and/or deletion from the nonvolatile memory 4. The writing and/or deletion controlling program is to be transferred from the nonvolatile memory 4 to a control RAM 15. One of the controller 105 and the FCPU 112 both of which are responsive to a request from the main CPU 2 implements the transferring.
As such, the sub CPU 112 in the controller 105 implements the program control so as to control the writing in and/or deletion from the nonvolatile memory 4, intending to improve real-time capability of the MCU, and to shorten a time-period required for an execution of a user program stored in the nonvolatile memory 4 by the main CPU.